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| NAIBRDFUNC int32_t NAIAPI | naibrd_SUM1553_GetChannelCount (uint32_t modid) |
| | Returns the number of channels for the specified 1553 Module ID.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_SetMode (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_opstatus_t mode) |
| | Sets the 1553 channel mode. Depending on the mode set, this function will set up the Core registers for the specified mode.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_EnableExecution (int32_t cardIndex, int32_t module, int32_t channel, bool_t enabled) |
| | Sets or clears the Start Execution (STEX) bit in the Control Register (Core Register 0, bit 15).
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Reset (int32_t cardIndex, int32_t module, int32_t channel) |
| | Resets the 1553 channel.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_IsResetting (int32_t cardIndex, int32_t module, int32_t channel, bool_t *outresetting) |
| | Reads the Control register Software Reset (SRST) bit (Core Register 0, bit 13) and returns the resetting state based on bit state of this bit. The core automatically clears the Software Reset bit after it resets itself.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_SetBroadcastEnable (int32_t cardIndex, int32_t module, int32_t channel, bool_t enable) |
| | Sets the Control Register Broadcast Enable (BCEN) bit (Core Register 0, bit 4) state. When broadcast is disables, RT Address 31 can be used as an RT address, otherwise it is used for 1553 broadcast mode.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_GetBroadcastEnable (int32_t cardIndex, int32_t module, int32_t channel, bool_t *outenabled) |
| | Retrieves the Control Register Broadcast Enable (BCEN) bit (Core Register 0, bit 4) state. When broadcast is disables, RT Address 31 can be used as an RT address, otherwise it is used for 1553 broadcast mode.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_GetOpStatus (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_opstatus_t *outstatus) |
| | Retrieves the Operation and Status Register (Core Register 1) value. The Operation and Status register reflects pertinent information for the core. If stimulus is applied to the input pins, this register will reflect the actual stimulus in the Remote Terminal Address (RTA) bits (bits 15:11), RT Address Parity (RTPTY) bit (bit 10), Mode Select (MSEL) bits (bit 9:8), 1553A or 1553B Support (A/B STD) (bit 7) and LOCK Status (LOCK) bit (bit 6). When the core is operational (in other words, Control Register Start Execution (STEX) bit is 1 (Core Register 0, bit 15), the Operation and Status Register cannot be written to.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_GetBITStatus (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_bit_status_t *outbit) |
| | Retrieves the Built-in-Test Register (Core Register 6) value. The BIT register contains the status of the automatic health monitoring of the core. The core does not support the Control register BIT function (Core Register 0, bit 14).
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BC_SetCmdBlockPtr (int32_t cardIndex, int32_t module, int32_t channel, uint32_t blockIndex) |
| | Sets the Command Block Pointer Register (Core Register 8) to the location to start the command blocks associated with the "blockIndex" passed in. The Bus Controller command blocks are eight-word, contiguous blocks of memory that contains opcodes for controlling the core as well as 1553 command words and associated data locations in memory. After execution begins, this register is automatically updated with the address of the next block.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BC_GetCmdBlockPtr (int32_t cardIndex, int32_t module, int32_t channel, uint32_t *outblockIndex) |
| | Retrieves the "blockIndex" value associated with the address read from the Command Block Pointer Register (Core Register 8). The Bus Controller command blocks are eight-word, contiguous blocks of memory that contains opcodes for controlling the core as well as 1553 command words and associated data locations in memory. After execution begins, this register is automatically updated with the address of the next block.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BC_LoadCmdBlock (int32_t cardIndex, int32_t module, int32_t channel, uint32_t blockIndex, uint16_t ctrl, uint16_t cmd1, uint16_t cmd2, uint16_t datablock, uint16_t branchblock, uint32_t timerus) |
| | Loads the BC Command Block. Each command block contains eight-words.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BC_ReadCmdBlock (int32_t cardIndex, int32_t module, int32_t channel, uint32_t blockIndex, uint16_t *outctrl, uint16_t *outcmd1, uint16_t *outcmd2, uint16_t *outdatablock, uint16_t *outstatus1, uint16_t *outstatus2, uint16_t *outbranchblock, uint32_t *outtimerus) |
| | Retrieves the BC Command Block. Each command block contains eight-words.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BC_ClearBAME (int32_t cardIndex, int32_t module, int32_t channel, uint32_t blockIndex) |
| | Clears the Command Block's Control Word Block Access Message Error (bit 0) bit. This bit is set when a protocol message error occurred in the RT response. The host or subsystem should reset this bit when writing the control word into memory.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BC_SetCmdBlockDataPtr (int32_t cardIndex, int32_t module, int32_t channel, uint32_t blockIndex, uint16_t datablock) |
| | Sets the Command Block's Data Pointer (Word 4). The Data Pointer specifies the first location in memory where data associated with the command word(s) is to be stored or fetched from.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BC_ReadCmdBlockDataPtr (int32_t cardIndex, int32_t module, int32_t channel, uint32_t blockIndex, uint16_t *outdatablock) |
| | Retrieves the Command Block's Data Pointer (Word 4). The Data Pointer specifies the first location in memory where data associated with the command word(s) is to be stored or fetched from.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BC_LoadDataBlock (int32_t cardIndex, int32_t module, int32_t channel, uint32_t blockIndex, const uint16_t datablock[32]) |
| | Loads the BC Data Block. Each data block contains 32-words.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BC_ReadDataBlock (int32_t cardIndex, int32_t module, int32_t channel, uint32_t blockIndex, uint16_t outdatablock[32]) |
| | Retrieves the BC Data Block. Each data block contains 32-words.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_SetAddress (int32_t cardIndex, int32_t module, int32_t channel, uint8_t address) |
| | Sets the Remote Terminal Address and RT Address Parity in the Operation and Status register (Core Register 1, bits 15:11 for RT Address and bit 10 (RT Address Parity).
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_GetAddress (int32_t cardIndex, int32_t module, int32_t channel, uint8_t *outaddress) |
| | Gets the Remote Terminal Address in the Operation and Status register (Core Register 1, bits 15:11 for RT Address).
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_SetBusEnable (int32_t cardIndex, int32_t module, int32_t channel, bool_t aenable, bool_t benable) |
| | Sets the Control Register Bus A Enable (BAEN) and Bus B Enable (BBEN) bits (Core Register 0, bit 12:11) state. When broadcast is disables, RT Address 31 can be used as an RT address, otherwise it is used for 1553 broadcast mode.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_GetBusEnable (int32_t cardIndex, int32_t module, int32_t channel, bool_t *outaenable, bool_t *outbenable) |
| | Retrieves the Control Register Bus A Enable (BAEN) and Bus B Enable (BBEN) bits (Core Register 0, bit 12:11) state. When broadcast is disables, RT Address 31 can be used as an RT address, otherwise it is used for 1553 broadcast mode.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_ConfigureForCircBuffer (int32_t cardIndex, int32_t module, int32_t channel) |
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_ConfigureForPingPong (int32_t cardIndex, int32_t module, int32_t channel) |
| | Configures the Remote Terminal Descriptor Table to support Ping Pong mode for the specified 1553 channel.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_SetPingPongEnable (int32_t cardIndex, int32_t module, int32_t channel, bool_t enabled) |
| | Sets the Control Register Ping-Pong Enable (PPEN) bit (Core Register 0, bit 2) state.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_GetPingPongEnable (int32_t cardIndex, int32_t module, int32_t channel, bool_t *outenabled) |
| | Retrieves the Control Register Ping-Pong Enable (PPEN) bit (Core Register 0, bit 2) state.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_GetPingPongEnabled (int32_t cardIndex, int32_t module, int32_t channel, bool_t *outenabled) |
| | Retrieves the Control Register Message Time-out (MSGTO) bit (Core Register 0, bit 9) state. For RT operation, when ping-pong buffer mode is enabled, the MSGTO bit set to 1 serves to acknowledge to the host that ping-pong mode has been enabled. When the bit is set to 0 serves to acknowledge to the host that the ping-pong mode has been disabled.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_SetStatusWord (int32_t cardIndex, int32_t module, int32_t channel, uint16_t rtstatus) |
| | Sets the 1553 A/B Status Word register (Core Register 9) value. For both MIL-STD-1553A and B applications, this register contains the value for the status word. The host or subsystem controls the outgoing MIL-STD-1553 status word by setting the various status bits. If the Immediate Clear function is enabled (bit 15), then the status bits are automatically cleared after status word transmission. The Immediate Clear function does not alter the operation of the Trasmit Status word and Transmit Last Command Word mode codes.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_Legalize (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_samctype_t samctype, uint32_t samcmask, bool_t legal) |
| | Sets up the legalization registers (Core Register 16-31) which are used by the RT to determine which valid, received commands are legal. A command determined to be illegal if it is supported by neither by the standard nor by additional system requirements. Note, the actual value written to the legalization registers is defined as follows: '1' illegalizes a command and '0' legalizes a command.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_GetControlWord (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_samctype_t samctype, uint16_t samc, uint16_t *outctrl) |
| | Retrieves the Descriptor Block Control Word. The control word is used by the core in message processing and is initialized by the host or subsystem. The core updates the control word during command post-processing to provide the host or subsystem details about the transaction.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_ClearBlockAccess (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_samctype_t samctype, uint16_t samc) |
| | Clears Block Accessed bit in the Descriptor Block Control Word (bit 4). The core will set the BAC bit at the end of message processing to indicate processing status to the host or subsystem. The host or subsystem must initialize this bit to 0.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_LoadTxDataBlock (int32_t cardIndex, int32_t module, int32_t channel, bool_t sadatablock, uint16_t addr, const uint16_t datablock[32]) |
| | Sets the 32 Data Words to be transmitted when a RT-BC message is received.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_ReadTxDataBlock (int32_t cardIndex, int32_t module, int32_t channel, bool_t sadatablock, uint16_t addr, uint16_t outdatablock[32]) |
| | Retrieves the 32 Data Words to be transmitted when a RT-BC message is received.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_ReadRxDataBlock (int32_t cardIndex, int32_t module, int32_t channel, bool_t sadatablock, uint16_t addr, uint16_t *outwordcnt, uint16_t *outtimestamp, uint16_t outdatablock[32]) |
| | Retrieves the 32 Data Words received from a BC-RT message.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_LoadTxCircBuffer (int32_t cardIndex, int32_t module, int32_t channel, bool_t sadatablock, uint16_t addr, int32_t wordcount, uint16_t *data) |
| | Loads the circular buffer with data of size given by the word count. In the buffer, the address, at which the data gets written, is maintained by an internal pointer. This pointer advances by the amount given by 2 + wordcount (message information word + timetag + payload) after the data is written to the buffer. If the pointer advances beyond the end of the buffer region, the pointer goes to the start of the buffer.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_ReadTxCircBuffer (int32_t cardIndex, int32_t module, int32_t channel, bool_t sadatablock, uint16_t addr, int32_t wordcount, uint16_t *outdata) |
| | Retrieves the data of size given by the word count from the Tx circular buffer for the given subaddress. An internal pointer determines the starting address in the buffer from which to read. Each successful call to naibrd_SUM1553_RT_AdvCircBufInternalPtr() will advance the internal pointer to the next available address.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_ReadRxCircBuffer (int32_t cardIndex, int32_t module, int32_t channel, bool_t sadatablock, uint16_t addr, uint16_t *outwordcnt, uint16_t *outtimestamp, uint16_t *outdata) |
| | Retrieves the data of size given by the word count from the Rx circular buffer for the given subaddress. An internal pointer determines the starting address in the buffer from which to read. Each successful call to naibrd_SUM1553_RT_AdvCircBufInternalPtr() will advance the internal pointer to the next available address.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_AdvCircBufInternalPtr (int32_t cardIndex, int32_t module, int32_t channel, bool_t sadatablock, uint16_t addr) |
| | This function advances the circular buffer read internal pointer to the next available address. If the next available address is past the end of the circular buffer, the pointer will be set to the starting address of the circular buffer.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_RT_SetSAMCInterruptMask (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_samctype_t samctype, uint16_t samc, nai_sum1553_sa_irq_t mask) |
| | Sets the Interrupt when Accessed (IWA) bit (bit 6) or Interrupt Broadcast Received (IBRD) bit (bit 5) in Descriptor Block Control Word. If the IWA bit is set to 1, the core will generate an interrupt when a valid subaddress or mode code command is received. If the IBRD bit is set to 1, the core will generate an interrupt when a valid subaddress or mode code broadcast command is received. The interrupt will be entered into the Pending Interrupt register (Core Register 4) if not masked.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BM_SetMonitorFilter (int32_t cardIndex, int32_t module, int32_t channel, bool_t monitorAll, uint32_t monitorFilter) |
| | Sets up the Bus Monitor filter registers. If all RTs are to be monitored, the Bus Monitor Control (BMC) bit (Core Register 0 bit 5) will be set to 0, otherwise this bit is set to 1 and the core will only monitor the RTs specified in the Monitor Filter registers (Core Register 14 and 15).
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BM_GetMonitorFilter (int32_t cardIndex, int32_t module, int32_t channel, bool_t *outmonitorAll, uint32_t *outmonitorFilter) |
| | Retrieves the Bus Monitor filter registers. If all RTs are to be monitored, the Bus Monitor Control (BMC) bit (Core Register 0 bit 5) will be set to 0, otherwise this bit is set to 1 and the core will only monitor the RTs specified in the Monitor Filter registers (Core Register 14 and 15).
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BM_SetMonitorBlockCount (int32_t cardIndex, int32_t module, int32_t channel, uint16_t blockcnt) |
| | Sets the Monitor Block Count (MBC) register (Core Register 13). The Monitor Block Count register is used to set the number of monitor blocks to be logged. Once execution begins, the value contained in the register will be decremented. Upon reaching 0, an MBC interrupt is generated (Core Register 4 bit 0). The core will restart at the initial address specified in the Monitor Command Pointer register (Core Register 11) and Monitor Data Pointer register (Core Register 12). Note: The Monitor Block Count initial value allows that number of blocks + 1; it is really used as an index. So if the initial count is set to 1023, 1024 blocks will be monitored.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BM_GetMonitorBlockCount (int32_t cardIndex, int32_t module, int32_t channel, uint16_t *outblockcnt) |
| | Retrieves the Monitor Block Count (MBC) register (Core Register 13). The Monitor Block Count register is used to set the number of monitor blocks to be logged. Once execution begins, the value contained in the register will be decremented. Upon reaching 0, an MBC interrupt is generated (Core Register 4 bit 0). The core will restart at the initial address specified in the Monitor Command Pointer register (Core Register 11) and Monitor Data Pointer register (Core Register 12). Note: The Monitor Block Count initial value allows that number of blocks + 1; it is really used as an index. So if the initial count is set to 1023, 1024 blocks will be monitored.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_BM_ReadDataBlock (int32_t cardIndex, int32_t module, int32_t channel, uint16_t datablock, uint16_t *outinfo, uint16_t *outcmd1, uint16_t *outcmd2, uint16_t *outstatus1, uint16_t *outstatus2, uint16_t *outtimetag, uint16_t outdatablock[32]) |
| | Retrieves the message and associated control words read by the Bus Monitor for the Data Block value read from the Monitor Block Counter register (Core Register 13).
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_SetInterruptMask (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_interrupt_t mask) |
| | Sets the Interrupt Mask (Core Register 3). An interrupt is masked if the corresponding bit of this register is set to low, allowing the host or subsystem to temporarily disable the service of interrupts. While masked, interrupt notification does not occur. The unmasking of an interrupt after the event occurs does not generate an interrupt for that event.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_SetInterruptVector (int32_t cardIndex, int32_t module, int32_t channel, uint32_t vector) |
| | Sets the Interrupt Vector for the specified 1553 channel.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_GetInterruptVector (int32_t cardIndex, int32_t module, int32_t channel, uint32_t *outvector) |
| | Gets the Interrupt Vector for the specified 1553 channel.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_GetInterruptStatus (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_interrupt_t *outpending) |
| | Retrieves the data in the Pending Interrupt register (Core Register 4). This register identifies interrupt events. The Pending Interrupt register is cleared at the end of a read or write to any other core register.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_GetInterruptLogPtr (int32_t cardIndex, int32_t module, int32_t channel, uint16_t *outaddr) |
| | Retrieves the data in the Interrupt Pointer register (Core Register 5). The Interrupt Pointer register contains the starting base address and pointer location of the Interrupt Log List. The Interrupt Log List is a 32-word ring-buffer that contains information necessary to service interrupts. The most significant 11 bits designate the base address of the ring buffer (which occurs on a 32-word boundary, i.e., the host must initialize the five least significant bits). Note the naibrd_SUM1553_SetMode() routine initializes Interrupt Pointer register to 0xF000. The core controls the five least significant bits to indicate the pointer location. The host or subsystem reads these five bits to determine the location and number of interrupts within the Interrupt Log List.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_GetInterruptLogEntry (int32_t cardIndex, int32_t module, int32_t channel, uint16_t addr, uint16_t *outstatus, uint16_t *outaddr) |
| | Retrieves the Interrupt Information Word (IIW) and Interrupt Address Word (IAW) associated with the Interrupt Log List Address. The Interrupt Information Word format is identical to that of the Pending Interrupt register (Core Register 4).
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_InstallLogIDR (int32_t cardIndex, int32_t module, int32_t channel, int32_t slot, nai_ether_upr_type_t uprtype, uint8_t ip[], uint16_t port, uint8_t seqhi, uint16_t vector) |
| | Sets up a Interrupt Driven Reply (IDR) Unprompted Reply (UPR) that will read the Interrupt Pending Register (Core Register 4) whenever the interrupt associated with the vector passed in occurs.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_ProcessLogIDR (int32_t cardIndex, int32_t module, int32_t channel, uint8_t msg[], nai_ether_typecode_t typecode, nai_ether_gen_t gen, int32_t offset, uint16_t *outlogptr) |
| | Decodes the UPR Read message that is passed in and returns the data content.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_ReadCoreReg (int32_t cardIndex, int32_t module, int32_t channel, uint32_t corereg, uint16_t *outdata) |
| | Retrieves the value in the Core Register specified.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_WriteCoreReg (int32_t cardIndex, int32_t module, int32_t channel, uint32_t corereg, uint16_t data) |
| | Sets the value in the Core Register specified.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Read (int32_t cardIndex, int32_t module, int32_t channel, uint32_t address, uint32_t count, uint16_t outdata[]) |
| | Retrieves the values in the address(es) specified. The page register associated with the address(es) specified is set to window the memory into the module memory space. Note addressing is word-based to match the core's addressing scheme.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Write (int32_t cardIndex, int32_t module, int32_t channel, uint32_t address, uint32_t count, const uint16_t data[]) |
| | Sets the values in the address(es) specified. The page register associated with the address(es) specified is set to window the memory into the module memory space. Note addressing is word-based to match the core's addressing scheme.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_WriteMask (int32_t cardIndex, int32_t module, int32_t channel, uint32_t address, uint16_t mask, uint16_t data) |
| | Writes a value to the address specified, updating only the bit positions that are set in mask. The resulting value in the register will be (oldData & ~mask) | (data & mask). The mask and value may be truncated or padded with zeros depending on the register width. The page register associated with the address(es) specified is set to window the memory into the module memory space. Note addressing is word-based to match the core's addressing scheme.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Proc_SetCtrl (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_procctrl_t mask) |
| | Sets the 1553 Processor Control Register for the specified 1553 channel.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Proc_ClearFifo (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_procfifo_t fifos) |
| | Clears the specified FIFO for the specified 1553 channel by resetting the count register for the FIFO to zero.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Proc_RT_SetEventSAMask (int32_t cardIndex, int32_t module, int32_t channel, int32_t event, uint32_t samask) |
| | Sets the Subaddresses mask such that only the 1553 messages received from these subaddresses are placed on the "Event" FIFO and retrieved in the Interrupt Driven Reply (IDR) Unprompted Reply (UPR) message.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Proc_SetEventVector (int32_t cardIndex, int32_t module, int32_t channel, int32_t event, uint16_t vector) |
| | Sets the Interrupt Event Vector for Ethernet Unprompted Replies (UPR) associated with the Event Subaddress Mask. Whenever the Interrupt Event Vector is generated the contents in the Event FIFO are read and sent to the host as a Unprompted Reply (UPR) message.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Proc_RT_LoadDataBlock (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_samctype_t samctype, uint16_t subaddr, const uint16_t datablock[], uint16_t offset, uint16_t count) |
| | Sets the 32 Data Words to be transmitted when a RT-BC message is received by placing a request on the "Request" FIFO for the 1553 Processor to write to the 1553 Core memory.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Proc_RT_ReadDataBlock (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_samctype_t samctype, uint16_t subaddr, uint16_t outdatablock[], uint16_t offset, uint16_t count) |
| | Retrieves the 32 Data Words for 1553 message by placing a request on the "Request" FIFO for the 1553 Processor to read the data and placing the response on the "Response" FIFO which is then read by this routine.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Proc_SetEventUPR (int32_t cardIndex, int32_t module, int32_t channel, int32_t slot, nai_ether_upr_type_t uprtype, uint8_t ip[], uint16_t port, uint8_t seqhi, uint16_t vector) |
| | Sets up a Interrupt Driven Reply (IDR) Unprompted Reply (UPR) that will read EVENT_FIFO_FRAME_SIZE words from the "Event" FIFO whenever the interrupt associated with the vector passed in occurs.
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| NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Proc_ProcessEventUPR (int32_t cardIndex, int32_t module, int32_t channel, uint8_t msg[], nai_ether_typecode_t typecode, nai_ether_gen_t gen, int32_t offset, nai_sum1553_eventtype_t *outevent, nai_sum1553_samctype_t *outtype, uint16_t *outsa, uint16_t *outwordcount, uint16_t *outinfo, uint16_t *outtimestamp, uint16_t outcmd[2], uint16_t outstatus[2], uint16_t data[32]) |
| | Decodes the UPR Read message that is passed in and returns the data content.
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1.11.0