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NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_SetMode (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_opstatus_t mode) |
| Sets the 1553 channel mode. Depending on the mode set, this function will set up the Core registers for the specified mode.
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NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_EnableExecution (int32_t cardIndex, int32_t module, int32_t channel, bool_t enabled) |
| Sets or clears the Start Execution (STEX) bit in the Control Register (Core Register 0, bit 15).
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NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_Reset (int32_t cardIndex, int32_t module, int32_t channel) |
| Resets the 1553 channel.
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NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_IsResetting (int32_t cardIndex, int32_t module, int32_t channel, bool_t *outresetting) |
| Reads the Control register Software Reset (SRST) bit (Core Register 0, bit 13) and returns the resetting state based on bit state of this bit. The core automatically clears the Software Reset bit after it resets itself.
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NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_SetBroadcastEnable (int32_t cardIndex, int32_t module, int32_t channel, bool_t enable) |
| Sets the Control Register Broadcast Enable (BCEN) bit (Core Register 0, bit 4) state. When broadcast is disables, RT Address 31 can be used as an RT address, otherwise it is used for 1553 broadcast mode.
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NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_GetBroadcastEnable (int32_t cardIndex, int32_t module, int32_t channel, bool_t *outenabled) |
| Retrieves the Control Register Broadcast Enable (BCEN) bit (Core Register 0, bit 4) state. When broadcast is disables, RT Address 31 can be used as an RT address, otherwise it is used for 1553 broadcast mode.
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NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_GetOpStatus (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_opstatus_t *outstatus) |
| Retrieves the Operation and Status Register (Core Register 1) value. The Operation and Status register reflects pertinent information for the core. If stimulus is applied to the input pins, this register will reflect the actual stimulus in the Remote Terminal Address (RTA) bits (bits 15:11), RT Address Parity (RTPTY) bit (bit 10), Mode Select (MSEL) bits (bit 9:8), 1553A or 1553B Support (A/B STD) (bit 7) and LOCK Status (LOCK) bit (bit 6). When the core is operational (in other words, Control Register Start Execution (STEX) bit is 1 (Core Register 0, bit 15), the Operation and Status Register cannot be written to.
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NAIBRDFUNC nai_status_t NAIAPI | naibrd_SUM1553_GetBITStatus (int32_t cardIndex, int32_t module, int32_t channel, nai_sum1553_bit_status_t *outbit) |
| Retrieves the Built-in-Test Register (Core Register 6) value. The BIT register contains the status of the automatic health monitoring of the core. The core does not support the Control register BIT function (Core Register 0, bit 14).
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NAIBRDFUNC nai_status_t NAIAPI naibrd_SUM1553_EnableExecution |
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int32_t | cardIndex, |
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int32_t | module, |
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int32_t | channel, |
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bool_t | enabled ) |
Sets or clears the Start Execution (STEX) bit in the Control Register (Core Register 0, bit 15).
For Bus Controller operation, the core operation is halted after completing the current opcode. Prior to halting,
the core determines the next command block pointer address and loads the value into Command Block Pointer Register
(Core Register 8). For the End-of-List command block, Command Block Pointer Register is not updated.
For Remote Terminal operation, an RT address parity error will stop core operation regardless of how this Execution
bit is set. If an RT address parity error occurs, the Operations and Status register (Core Register 1) Core Executing (EX) bit
(bit 3) is cleared and RT Address Parity Fail (TAPF) bit (bit 2) is set.
For Bus Monitor operation, the core operation is halted after processing the current 1553 message.
- Parameters
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cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
enabled | : (Input) Start or halt the 1553 operation. |
- Returns
- NAI_SUCCESS
- NAI_ERROR_INVALID_CARD when invalid card parameter is specified.
- NAI_ERROR_INVALID_MODULE when invalid card parameter is specified.
- NAI_ERROR_NOT_OPEN when handle to board is invalid.
- NAI_ERROR_INVALID_CHANNEL when invalid channel parameter is specified.
- NAI_ERROR_NOT_SUPPORTED when function is not supported.
NAIBRDFUNC nai_status_t NAIAPI naibrd_SUM1553_GetBITStatus |
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int32_t | cardIndex, |
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int32_t | module, |
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int32_t | channel, |
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nai_sum1553_bit_status_t * | outbit ) |
Retrieves the Built-in-Test Register (Core Register 6) value. The BIT register contains the status of the automatic health monitoring of the core. The core does not support the Control register BIT function (Core Register 0, bit 14).
The following Built-in-Test status are monitored:
- DMA Fail Interrupt (DMAF) (bit 15) - For all operating modes: to allow the core to correctly transmit and
receive on the 1553 bus, all memory accesses must complete within a specified time. When the core accesses
memory, an internal timer is started. If the memory access is not completed by the time the counter decrements
to 0, this interrupt is generated.
- Wrap Fail Interrupt (WRAPF) (bit 14) - For BC and RT modes only: the core automatically compares the
transmitted word (encoder word) to the reflected decoder word via the continuous loopback feature. If the
encoder word and reflected word do not match, the WRAPF bit is set.
- Terminal Address Parity Fail Interrupt (TAPF) (bit 13) - For RT mode only: this bit is set high to indicate
an RT address parity error. When a parity error occurs, the core will not begin operation (Control Register
Start Execution (STEX) bit (Core Register 0 bit 15) is forced low and Bus A and Bus B are not enabled.
- Channel A Failure (CHAF) (bit 11) - Set when tranmitter time-out occurs on Bus A.
- Channel B Failure (CHBF) (bit 10) - Set when tranmitter time-out occurs on Bus B.
- Parameters
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cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
outbit | : (Output) Built-in-Test value. |
- Returns
- NAI_SUCCESS
- NAI_ERROR_INVALID_CARD when invalid card parameter is specified.
- NAI_ERROR_INVALID_MODULE when invalid card parameter is specified.
- NAI_ERROR_NOT_OPEN when handle to board is invalid.
- NAI_ERROR_INVALID_CHANNEL when invalid channel parameter is specified.
- NAI_ERROR_NOT_SUPPORTED when function is not supported.
NAIBRDFUNC nai_status_t NAIAPI naibrd_SUM1553_GetOpStatus |
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int32_t | cardIndex, |
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int32_t | module, |
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int32_t | channel, |
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nai_sum1553_opstatus_t * | outstatus ) |
Retrieves the Operation and Status Register (Core Register 1) value. The Operation and Status register reflects pertinent information for the core. If stimulus is applied to the input pins, this register will reflect the actual stimulus in the Remote Terminal Address (RTA) bits (bits 15:11), RT Address Parity (RTPTY) bit (bit 10), Mode Select (MSEL) bits (bit 9:8), 1553A or 1553B Support (A/B STD) (bit 7) and LOCK Status (LOCK) bit (bit 6). When the core is operational (in other words, Control Register Start Execution (STEX) bit is 1 (Core Register 0, bit 15), the Operation and Status Register cannot be written to.
- Parameters
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cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
outstatus | : (Output) Operation and Status value. |
- Returns
- NAI_SUCCESS
- NAI_ERROR_INVALID_CARD when invalid card parameter is specified.
- NAI_ERROR_INVALID_MODULE when invalid card parameter is specified.
- NAI_ERROR_NOT_OPEN when handle to board is invalid.
- NAI_ERROR_INVALID_CHANNEL when invalid channel parameter is specified.
- NAI_ERROR_NOT_SUPPORTED when function is not supported.
NAIBRDFUNC nai_status_t NAIAPI naibrd_SUM1553_SetMode |
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int32_t | cardIndex, |
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int32_t | module, |
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int32_t | channel, |
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nai_sum1553_opstatus_t | mode ) |
Sets the 1553 channel mode. Depending on the mode set, this function will set up the Core registers for the specified mode.
Bus Controller Mode:
- Initializes the Command Block Pointer register (Core Register 8). This register contains the location to start the
command blocks. After execution begins, this register is automatically updated with the address of the next block.
Remote Terminal Mode:
- Initializes the Descriptor Pointer register (Core Register 8). This register contains the address that points to the
top of the memory space referred to as the Descriptor Table. The core uses the T/R bit, subaddress/mode code
field, and the mode code to select one block within the descriptor table needed for message processing.
Bus Monitor Mode:
- Initializes the Monitor Command Pointer register (Core Register 11). This register contains the starting address for
the monitor blocks.
- Initializes the Monitor Data Pointer register (Core Register 12). This register contains the starting address for the
monitor data.
- Initializes the Monitor Block Count register (Core Register 13). This register is used to set the number of monitor
blocks to be logged (this routine will set the number of monitor blocks to NAI_SUM1553_BM_CMDBLK_CNT).
Once execution begins, the value contained in this register will be decremented. Upon reaching 0, an interrupt is
generated (Monitor Block Counter (MBC) Interrupt - Core Register 4, bit 0). The core will restart at the initial address
specified in Register 11 and Register 12.
For all three modes:
- Initializes Interrupt Pointer register (Core Register 5) to 0xF000. This register contains the starting base
address and pointer location of the Interrupt Log list. The Interrupt Log List is a 32-word ring-buffer that
contains information necessary to service interrupts. The most significant 11 bits designate the base address
of the ring buffer (which occurs on 1 32-word boundary). The core controls the five least significant bits to
indicate the pointer location. These five bits determine the location and number of interrupts within the
Interrupt Log List.
- Clears the Dual Port RAM for the Interrupt Log for each channel.
- Enables the Interrupt Log List Enable (INEN) bit (Core Register 0, bit 1).
- Sets the Mode Select (MSEL) bits in the Operation and Status Register (Core Register 1, bits 9:8) to the Mode specified.
- Parameters
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cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
mode | : (Input) 1553 operation mode (NAI_SUM1553_OPSTATUS_BC_MODE, NAI_SUM1553_OPSTATUS_RT_MODE or NAI_SUM1553_OPSTATUS_BM_MODE. |
- Returns
- NAI_SUCCESS
- NAI_ERROR_INVALID_CARD when invalid card parameter is specified.
- NAI_ERROR_INVALID_MODULE when invalid card parameter is specified.
- NAI_ERROR_NOT_OPEN when handle to board is invalid.
- NAI_ERROR_INVALID_CHANNEL when invalid channel parameter is specified.
- NAI_ERROR_NOT_SUPPORTED when function is not supported.