naibrd_dif.h

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typedef int32_t nai_dif_status_type_t;
enum nai_dif_status_type
{
   NAI_DIF_STATUS_BIT_LATCHED,
   NAI_DIF_STATUS_BIT_REALTIME,
   NAI_DIF_STATUS_OVERCURRENT_LATCHED,
   NAI_DIF_STATUS_OVERCURRENT_REALTIME,
   NAI_DIF_STATUS_LO_HI_TRANS_LATCHED,
   NAI_DIF_STATUS_LO_HI_TRANS_REALTIME,
   NAI_DIF_STATUS_HI_LO_TRANS_LATCHED,
   NAI_DIF_STATUS_HI_LO_TRANS_REALTIME,
   NAI_DIF_CTS_STATUS_RUN_LATCHED,           /* DF3 Only */
   NAI_DIF_CTS_STATUS_RUN_REALTIME,          /* DF3 Only */
   NAI_DIF_STATUS_TYPE_ENUM_COUNT
};
enum nai_dif_status_type
{
   NAI_DIF_STATUS_BIT_LATCHED,
   NAI_DIF_STATUS_BIT_REALTIME,
   NAI_DIF_STATUS_OVERCURRENT_LATCHED,
   NAI_DIF_STATUS_OVERCURRENT_REALTIME,
   NAI_DIF_STATUS_LO_HI_TRANS_LATCHED,
   NAI_DIF_STATUS_LO_HI_TRANS_REALTIME,
   NAI_DIF_STATUS_HI_LO_TRANS_LATCHED,
   NAI_DIF_STATUS_HI_LO_TRANS_REALTIME,
   NAI_DIF_CTS_STATUS_RUN_LATCHED,           /* DF3 Only */
   NAI_DIF_CTS_STATUS_RUN_REALTIME,          /* DF3 Only */
   NAI_DIF_STATUS_TYPE_ENUM_COUNT
};
typedef int32_t nai_dif_reset_type_t;
enum nai_dif_reset_type
{
   NAI_DIF_RESET_TIMER_ONLY,
   NAI_DIF_RESET_OVERCURRENT,
   NAI_DIF_RESET_TYPE_ENUM_COUNT
};
enum nai_dif_reset_type
{
   NAI_DIF_RESET_TIMER_ONLY,
   NAI_DIF_RESET_OVERCURRENT,
   NAI_DIF_RESET_TYPE_ENUM_COUNT
};
typedef int32_t nai_dif_debounce_idx_t;
enum nai_dif_debounce_idx
{
   NAI_DIF_DEBOUNCE_IDX_0_00016MS,
   NAI_DIF_DEBOUNCE_IDX_0_00032MS,
   NAI_DIF_DEBOUNCE_IDX_0_00064MS,
   NAI_DIF_DEBOUNCE_IDX_0_00128MS,
   NAI_DIF_DEBOUNCE_IDX_0_00256MS,
   NAI_DIF_DEBOUNCE_IDX_0_00512MS,
   NAI_DIF_DEBOUNCE_IDX_0_01024MS,
   NAI_DIF_DEBOUNCE_IDX_0_02048MS,
   NAI_DIF_DEBOUNCE_IDX_0_04096MS,
   NAI_DIF_DEBOUNCE_IDX_0_08192MS,
   NAI_DIF_DEBOUNCE_IDX_0_16384MS,
   NAI_DIF_DEBOUNCE_IDX_0_32768MS,
   NAI_DIF_DEBOUNCE_IDX_0_65536MS,
   NAI_DIF_DEBOUNCE_IDX_1_31072MS,
   NAI_DIF_DEBOUNCE_IDX_2_62144MS,
   NAI_DIF_DEBOUNCE_IDX_5_24288MS
};
enum nai_dif_debounce_idx
{
   NAI_DIF_DEBOUNCE_IDX_0_00016MS,
   NAI_DIF_DEBOUNCE_IDX_0_00032MS,
   NAI_DIF_DEBOUNCE_IDX_0_00064MS,
   NAI_DIF_DEBOUNCE_IDX_0_00128MS,
   NAI_DIF_DEBOUNCE_IDX_0_00256MS,
   NAI_DIF_DEBOUNCE_IDX_0_00512MS,
   NAI_DIF_DEBOUNCE_IDX_0_01024MS,
   NAI_DIF_DEBOUNCE_IDX_0_02048MS,
   NAI_DIF_DEBOUNCE_IDX_0_04096MS,
   NAI_DIF_DEBOUNCE_IDX_0_08192MS,
   NAI_DIF_DEBOUNCE_IDX_0_16384MS,
   NAI_DIF_DEBOUNCE_IDX_0_32768MS,
   NAI_DIF_DEBOUNCE_IDX_0_65536MS,
   NAI_DIF_DEBOUNCE_IDX_1_31072MS,
   NAI_DIF_DEBOUNCE_IDX_2_62144MS,
   NAI_DIF_DEBOUNCE_IDX_5_24288MS
};
typedef int32_t nai_dif_enhanced_mode_t;
enum nai_dif_enhanced_mode
{
     NAI_DIF_MODE_STD_INPUT_OUTPUT,                  /* Input/Output based off ioformat */ 
     NAI_DIF_MODE_MEASURE_HIGH_TIME,                 /* High Time Measurement (uses FIFO to store measurements) */
     NAI_DIF_MODE_MEASURE_LOW_TIME,                  /* Low Time Measurement (uses FIFO to store measurements) */
     NAI_DIF_MODE_TIMESTAMP_RISING_EDGES,            /* Rising Edges Timestamps (uses FIFO to store measurements) */
     NAI_DIF_MODE_TIMESTAMP_FALLING_EDGES,           /* Falling Edges Timestamps (uses FIFO to store measurements) */
     NAI_DIF_MODE_TIMESTAMP_ALL_EDGES,               /* All Edges Timestamps (uses FIFO to store measurements) */
     NAI_DIF_MODE_COUNT_RISING_EDGES,                /* Rising Edges Total Count (uses FIFO to store measurements) */
     NAI_DIF_MODE_COUNT_FALLING_EDGES,               /* Falling Edges Total Count (uses FIFO to store measurements) */
     NAI_DIF_MODE_COUNT_ALL_EDGES,                   /* All Edges Total Count (uses FIFO to store measurements) */
     NAI_DIF_MODE_MEASURE_PERIOD_FROM_RISING_EDGE,   /* Period from Rising Edge Measurement (uses FIFO to store measurements) */
     NAI_DIF_MODE_MEASURE_FREQUENCY,                 /* Frequency Measurement (uses FIFO to store measurements) */
     NAI_DIF_MODE_OUTPUT_PWM_FOREVER,                /* Output PWM Forever */
     NAI_DIF_MODE_OUTPUT_PWM_CYCLE_NUM_TIMES,        /* Output PWM for Specified Number of Cycles */ 
     NAI_DIF_MODE_OUTPUT_PATTERN_RAM,                /* Output Pattern Generator RAM */
     NAI_DIF_MODE_TYPE_ENUM_COUNT                           
};
enum nai_dif_enhanced_mode
{
     NAI_DIF_MODE_STD_INPUT_OUTPUT,                  /* Input/Output based off ioformat */ 
     NAI_DIF_MODE_MEASURE_HIGH_TIME,                 /* High Time Measurement (uses FIFO to store measurements) */
     NAI_DIF_MODE_MEASURE_LOW_TIME,                  /* Low Time Measurement (uses FIFO to store measurements) */
     NAI_DIF_MODE_TIMESTAMP_RISING_EDGES,            /* Rising Edges Timestamps (uses FIFO to store measurements) */
     NAI_DIF_MODE_TIMESTAMP_FALLING_EDGES,           /* Falling Edges Timestamps (uses FIFO to store measurements) */
     NAI_DIF_MODE_TIMESTAMP_ALL_EDGES,               /* All Edges Timestamps (uses FIFO to store measurements) */
     NAI_DIF_MODE_COUNT_RISING_EDGES,                /* Rising Edges Total Count (uses FIFO to store measurements) */
     NAI_DIF_MODE_COUNT_FALLING_EDGES,               /* Falling Edges Total Count (uses FIFO to store measurements) */
     NAI_DIF_MODE_COUNT_ALL_EDGES,                   /* All Edges Total Count (uses FIFO to store measurements) */
     NAI_DIF_MODE_MEASURE_PERIOD_FROM_RISING_EDGE,   /* Period from Rising Edge Measurement (uses FIFO to store measurements) */
     NAI_DIF_MODE_MEASURE_FREQUENCY,                 /* Frequency Measurement (uses FIFO to store measurements) */
     NAI_DIF_MODE_OUTPUT_PWM_FOREVER,                /* Output PWM Forever */
     NAI_DIF_MODE_OUTPUT_PWM_CYCLE_NUM_TIMES,        /* Output PWM for Specified Number of Cycles */ 
     NAI_DIF_MODE_OUTPUT_PATTERN_RAM,                /* Output Pattern Generator RAM */
     NAI_DIF_MODE_TYPE_ENUM_COUNT                           
};
typedef uint8_t nai_dif_pattern_ctrl_t;
enum nai_dif_pattern_ctrl
{
   NAI_DIF_PATTERN_RAM_CONTROL_ENABLE,
   NAI_DIF_PATTERN_RAM_CONTROL_BURST,
   NAI_DIF_PATTERN_RAM_CONTROL_PAUSE,
   NAI_DIF_CTRL_PATTERN_SYNC_RISING,
   NAI_DIF_CTRL_PATTERN_SYNC_FALLING
};
enum nai_dif_pattern_ctrl
{
   NAI_DIF_PATTERN_RAM_CONTROL_ENABLE,
   NAI_DIF_PATTERN_RAM_CONTROL_BURST,
   NAI_DIF_PATTERN_RAM_CONTROL_PAUSE,
   NAI_DIF_CTRL_PATTERN_SYNC_RISING,
   NAI_DIF_CTRL_PATTERN_SYNC_FALLING
};
typedef uint32_t nai_dif_raw_module_t;
enum nai_dif_raw_module_type
{
   NAI_DIF_RAW_MODULE_DEBOUNCELSB,
   NAI_DIF_RAW_MODULE_POLARITY,
   NAI_DIF_RAW_MODULE_SLEWRATE,
   NAI_DIF_RAW_MODULE_TERMINATION,
   NAI_DIF_RAW_MODULE_TYPE_ENUM_COUNT
};
enum nai_dif_raw_module_type
{
   NAI_DIF_RAW_MODULE_DEBOUNCELSB,
   NAI_DIF_RAW_MODULE_POLARITY,
   NAI_DIF_RAW_MODULE_SLEWRATE,
   NAI_DIF_RAW_MODULE_TERMINATION,
   NAI_DIF_RAW_MODULE_TYPE_ENUM_COUNT
};
typedef uint32_t nai_dif_raw_group_t;
enum nai_dif_raw_group_type
{
   NAI_DIF_RAW_GROUP_OUTPUT_STATE,
   NAI_DIF_RAW_GROUP_INPUT_TERMINATION,
   NAI_DIF_RAW_GROUP_SLEW_RATE,
   NAI_DIF_RAW_GROUP_TYPE_ENUM_COUNT
};
enum nai_dif_raw_group_type
{
   NAI_DIF_RAW_GROUP_OUTPUT_STATE,
   NAI_DIF_RAW_GROUP_INPUT_TERMINATION,
   NAI_DIF_RAW_GROUP_SLEW_RATE,
   NAI_DIF_RAW_GROUP_TYPE_ENUM_COUNT
};
typedef uint32_t nai_dif_raw_channel_t;
enum nai_dif_raw_channel_type
{
   NAI_DIF_RAW_CHAN_DEBOUNCETIME,
   NAI_DIF_RAW_CHAN_PERIOD,
   NAI_DIF_RAW_CHAN_PULSEWIDTH,
   NAI_DIF_RAW_CHAN_BURSTCOUNT,
   NAI_DIF_RAW_CHAN_MODEREG,
   NAI_DIF_RAW_CHAN_TYPE_ENUM_COUNT
};
enum nai_dif_raw_channel_type
{
   NAI_DIF_RAW_CHAN_DEBOUNCETIME,
   NAI_DIF_RAW_CHAN_PERIOD,
   NAI_DIF_RAW_CHAN_PULSEWIDTH,
   NAI_DIF_RAW_CHAN_BURSTCOUNT,
   NAI_DIF_RAW_CHAN_MODEREG,
   NAI_DIF_RAW_CHAN_TYPE_ENUM_COUNT
};