naibrd.h

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enum naibrd_blockAccessOp
{
  NAIBRD_BLOCK_ACCESS_CONFIG = 0,
  NAIBRD_BLOCK_ACCESS_READ,
  NAIBRD_BLOCK_ACCESS_WRITE,
  NAIBRD_BLOCK_ACCESS_LAST
};
typedef int32_t naibrd_blockAccessOp_t;
enum naibrd_boardOpMode
{
  NAIBRD_OP_MODE_SLAVE = 0,
  NAIBRD_OP_MODE_MASTER,
};
typedef int32_t naibrd_boardOpMode_t;
enum naibrd_comm
{
  NAIBRD_COMM_NOT_OPEN = 0,
  NAIBRD_COMM_VME,
  NAIBRD_COMM_PCI,
  NAIBRD_COMM_ETHER_TCP,
  NAIBRD_COMM_ETHER_UDP,
  NAIBRD_COMM_ONBOARD,
  NAIBRD_COMM_PIB,
  NAIBRD_COMM_1553,
  NAIBRD_COMM_I2C
};
typedef int32_t naibrd_comm_t;
enum naibrd_int_steering
{
   NAIBRD_INT_STEERING_VME = 1,          /* Direct interrupt to VME Bus */
   NAIBRD_INT_STEERING_ON_BOARD_0 = 2,   /* Direct interrupt to the Custom Application on ARM */
   NAIBRD_INT_STEERING_ON_BOARD_1 = 3,   /* Direct interrupt to the NAI Ethernet Listener Application */
   NAIBRD_INT_STEERING_ON_BOARD_2 = 4,   /* Currently not used */
   NAIBRD_INT_STEERING_PCIE_APP = 5,     /* Direct interrupt to PCIe Bus */
   NAIBRD_INT_STEERING_CPCI_APP = 6      /* Direct interrupt to CPCI Bus */
};
typedef int32_t naibrd_int_steering_t;
enum naibrd_irq_id
{
   NAIBRD_IRQ_ID_ON_BOARD_0 = 0,       /* use with NAIBRD_INT_STEERING_ON_BOARD_0 (Custom Application on ARM) interrupt steering */
   NAIBRD_IRQ_ID_ON_BOARD_1,           /* use with NAIBRD_INT_STEERING_ON_BOARD_1 (NAI Ethernet Listener Application) interrupt steering */
   NAIBRD_IRQ_ID_ON_BOARD_2,           /* use with NAIBRD_INT_STEERING_ON_BOARD_2 (Currently not used) interrupt steering */
   NAIBRD_IRQ_ID_VME_LEVEL_0,               /* disable VME interrupt */
   NAIBRD_IRQ_ID_VME_LEVEL_1,               /*  VME interrupt level 1*/
   NAIBRD_IRQ_ID_VME_LEVEL_2,               /*  VME interrupt level 2*/
   NAIBRD_IRQ_ID_VME_LEVEL_3,               /*  VME interrupt level 3*/
   NAIBRD_IRQ_ID_VME_LEVEL_4,               /*  VME interrupt level 4*/
   NAIBRD_IRQ_ID_VME_LEVEL_5,               /*  VME interrupt level 5*/
   NAIBRD_IRQ_ID_VME_LEVEL_6,               /*  VME interrupt level 6*/
   NAIBRD_IRQ_ID_VME_LEVEL_7,               /*  VME interrupt level 7*/
   NAIBRD_IRQ_ID_DONT_CARE             /* use with all other interrupt steering where no IRQ_ID for hardware interfaces is required (e.g. PCIe, CPCI, etc.) */
};
typedef int32_t naibrd_irq_id_t;
enum nai_bit_type
{
   NAIBRD_UBIT_D0 = 0x00000001u,
   NAIBRD_CBIT_D2 = 0x00000004u,    /* Toggling of CBIT is Deprecated */
   NAIBRD_IBIT_D3 = 0x00000008u,
};
typedef int32_t nai_bit_type_t;
enum nai_module_info_type
{
   NAIBRD_MODULE_INFO_FPGA_REV,
   NAIBRD_MODULE_INFO_FPGA_COMPILE_TIMESTAMP,
   NAIBRD_MODULE_INFO_FPGA_SERDES_REV,
   NAIBRD_MODULE_INFO_FPGA_TEMPLATE_REV,
   NAIBRD_MODULE_INFO_FPGA_ZYNQ_BLOCK_REV,
   NAIBRD_MODULE_INFO_BM_REV,
   NAIBRD_MODULE_INFO_BM_COMPILE_TIME_BIT_0_TO_31,
   NAIBRD_MODULE_INFO_BM_COMPILE_TIME_BIT_32_TO_63,
   NAIBRD_MODULE_INFO_BM_COMPILE_TIME_BIT_64_TO_95,
   NAIBRD_MODULE_INFO_BM_COMPILE_TIME_BIT_96_TO_127,
   NAIBRD_MODULE_INFO_BM_COMPILE_TIME_BIT_128_TO_159,
   NAIBRD_MODULE_INFO_BM_COMPILE_TIME_BIT_160_TO_191,
   NAIBRD_MODULE_INFO_FSBL_REV,
   NAIBRD_MODULE_INFO_FSBL_COMPILE_TIME_BIT_0_TO_31,
   NAIBRD_MODULE_INFO_FSBL_COMPILE_TIME_BIT_32_TO_63,
   NAIBRD_MODULE_INFO_FSBL_COMPILE_TIME_BIT_64_TO_95,
   NAIBRD_MODULE_INFO_FSBL_COMPILE_TIME_BIT_96_TO_127,
   NAIBRD_MODULE_INFO_FSBL_COMPILE_TIME_BIT_128_TO_159,
   NAIBRD_MODULE_INFO_FSBL_COMPILE_TIME_BIT_160_TO_191,
   NAIBRD_MODULE_INFO_INTF_BOARD_SN_BIT_0_TO_31,
   NAIBRD_MODULE_INFO_INTF_BOARD_SN_BIT_32_TO_63,
   NAIBRD_MODULE_INFO_INTF_BOARD_SN_BIT_64_TO_95,
   NAIBRD_MODULE_INFO_INTF_BOARD_SN_BIT_96_TO_127,
   NAIBRD_MODULE_INFO_FUNC_BOARD_SN_BIT_0_TO_31,
   NAIBRD_MODULE_INFO_FUNC_BOARD_SN_BIT_32_TO_63,
   NAIBRD_MODULE_INFO_FUNC_BOARD_SN_BIT_64_TO_95,
   NAIBRD_MODULE_INFO_FUNC_BOARD_SN_BIT_96_TO_127,
   NAIBRD_MODULE_INFO_MOD_CAPABILITY,
   NAIBRD_MODULE_INFO_MOD_MEMORY_MAP_REV,
   NAIBRD_MODULE_INFO_TYPE_ENUM_COUNT
};
typedef uint32_t nai_module_info_type_t;
enum nai_series
{
   SERIES_NA,
   SERIES_D,
   SERIES_E
};
typedef uint32_t nai_series_t;
enum nai_module_temp_type
{
   NAIBRD_MODULE_TEMP_INTF_RT_ZYNQ_CORE,
   NAIBRD_MODULE_TEMP_INTF_RT_PCB,
   NAIBRD_MODULE_TEMP_FUNC_RT_PCB,
   NAIBRD_MODULE_TEMP_INTF_MAX_ZYNQ_CORE,
   NAIBRD_MODULE_TEMP_INTF_MAX_PCB,
   NAIBRD_MODULE_TEMP_INTF_MIN_ZYNQ_CORE,
   NAIBRD_MODULE_TEMP_INTF_MIN_PCB,
   NAIBRD_MODULE_TEMP_FUNC_MAX_PCB,
   NAIBRD_MODULE_TEMP_FUNC_MIN_PCB,
};
typedef uint32_t nai_module_temp_type_t;
enum nai_motherboard_temp_type
{
   NAIBRD_MOTHERBOARD_TEMP_RT_ZYNQ_CORE,           /* Address 0x0200, byte 0 */
   NAIBRD_MOTHERBOARD_TEMP_RT_PCB,                 /* Address 0x0200, byte 1 */
 
   NAIBRD_MOTHERBOARD_TEMP_RT_SLAVE_ZYNQ_CORE,     /* Address 0x0204, byte 0 */
   NAIBRD_MOTHERBOARD_TEMP_RT_SLAVE_PCB,           /* Address 0x0204, byte 1 */
 
   NAIBRD_MOTHERBOARD_TEMP_MAX_ZYNQ_CORE,          /* Address 0x0208, byte 0 */
   NAIBRD_MOTHERBOARD_TEMP_MAX_PCB,                /* Address 0x0208, byte 1 */
 
   NAIBRD_MOTHERBOARD_TEMP_MAX_SLAVE_ZYNQ_CORE,    /* Address 0x020C, byte 0 */
   NAIBRD_MOTHERBOARD_TEMP_MAX_SLAVE_PCB,          /* Address 0x020C, byte 1 */
 
   NAIBRD_MOTHERBOARD_TEMP_MIN_ZYNQ_CORE,          /* Address 0x0210, byte 0 */
   NAIBRD_MOTHERBOARD_TEMP_MIN_PCB,                /* Address 0x0210, byte 1 */
 
   NAIBRD_MOTHERBOARD_TEMP_MIN_SLAVE_ZYNQ_CORE,    /* Address 0x0214, byte 0 */
   NAIBRD_MOTHERBOARD_TEMP_MIN_SLAVE_PCB,          /* Address 0x0214, byte 1 */
};
typedef uint32_t nai_motherboard_temp_type_t;
enum nai_module_meas_type
{
   NAIBRD_MODULE_MEAS_ZYNQ_CORE_VOLTAGE,
   NAIBRD_MODULE_MEAS_ZYNQ_AUX_VOLTAGE,
   NAIBRD_MODULE_MEAS_ZYNQ_DDR_VOLTAGE,
   NAIBRD_MODULE_MEAS_INTF_BOARD_PCB_CURRENT_TEMP,
   NAIBRD_MODULE_MEAS_INTF_BOARD_ZYNQ_CURRENT_TEMP,
   NAIBRD_MODULE_MEAS_FUNC_BOARD_PCB_CURRENT_TEMP,
   NAIBRD_MODULE_MEAS_INTF_BOARD_PCB_MAX_TEMP,
   NAIBRD_MODULE_MEAS_INTF_BOARD_ZYNQ_MAX_TEMP,
   NAIBRD_MODULE_MEAS_INTF_BOARD_PCB_MIN_TEMP,
   NAIBRD_MODULE_MEAS_INTF_BOARD_ZYNQ_MIN_TEMP,
   NAIBRD_MODULE_MEAS_FUNC_BOARD_PCB_MAX_TEMP,
   NAIBRD_MODULE_MEAS_FUNC_BOARD_PCB_MIN_TEMP,
   NAIBRD_MODULE_MEAS_HIGH_PRCSN_ZYNQ_CORE_TEMP,
   NAIBRD_MODULE_MEAS_HIGH_PRCSN_INTF_PCB_TEMP,
   NAIBRD_MODULE_MEAS_HIGH_PRCSN_FUNC_PCB_TEMP,
   NAIBRD_MODULE_MEAS_TYPE_ENUM_COUNT
};
typedef uint32_t nai_module_meas_type_t;
enum nai_module_meas_raw_type
{
   NAIBRD_MODULE_MEAS_RAW_ZYNQ_CORE_VOLTAGE,
   NAIBRD_MODULE_MEAS_RAW_ZYNQ_AUX_VOLTAGE,
   NAIBRD_MODULE_MEAS_RAW_ZYNQ_DDR_VOLTAGE,
   NAIBRD_MODULE_MEAS_RAW_INTF_BOARD_PCB_ZYNQ_CURRENT_TEMP,
   NAIBRD_MODULE_MEAS_RAW_FUNC_BOARD_PCB_CURRENT_TEMP,
   NAIBRD_MODULE_MEAS_RAW_INTF_BOARD_PCB_ZYNQ_MAX_TEMP,
   NAIBRD_MODULE_MEAS_RAW_INTF_BOARD_PCB_ZYNQ_MIN_TEMP,
   NAIBRD_MODULE_MEAS_RAW_FUNC_BOARD_PCB_MAX_TEMP,
   NAIBRD_MODULE_MEAS_RAW_FUNC_BOARD_PCB_MIN_TEMP,
   NAIBRD_MODULE_MEAS_RAW_HIGH_PRCSN_ZYNQ_CORE_TEMP,
   NAIBRD_MODULE_MEAS_RAW_HIGH_PRCSN_INTF_PCB_TEMP,
   NAIBRD_MODULE_MEAS_RAW_HIGH_PRCSN_FUNC_PCB_TEMP,
   NAIBRD_MODULE_MEAS_RAW_TYPE_ENUM_COUNT
};
typedef uint32_t nai_module_meas_raw_type_t;
enum nai_module_health_monitor_type
{
   NAIBRD_MODULE_HEALTH_MONITOR_ZYNQ_CORE_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_ZYNQ_AUX_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_ZYNQ_DDR_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_ZYNQ_CORE_TEMP,
   NAIBRD_MODULE_HEALTH_MONITOR_INTF_BOARD_PCB_TEMP,
   NAIBRD_MODULE_HEALTH_MONITOR_FUNC_BOARD_PCB_TEMP,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_A_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_A_CURRENT,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_B_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_B_CURRENT,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_C_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_C_CURRENT,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_D_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_D_CURRENT,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_LDO_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_LDO_CURRENT,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_A_B_TEMP,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_1_LOOP_C_D_LDO_TEMP,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_A_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_A_CURRENT,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_B_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_B_CURRENT,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_C_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_C_CURRENT,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_D_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_D_CURRENT,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_LDO_VOLTAGE,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_LDO_CURRENT,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_A_B_TEMP,
   NAIBRD_MODULE_HEALTH_MONITOR_PWR_SUPPLY_2_LOOP_C_D_LDO_TEMP,
   NAIBRD_MODULE_HEALTH_MONITOR_TYPE_ENUM_COUNT
};
typedef uint32_t nai_module_health_monitor_type_t;
enum nai_module_health_monitor_value_type
{
   NAIBRD_MODULE_HEALTH_MONITOR_THRESHOLD_STATUS,
   NAIBRD_MODULE_HEALTH_MONITOR_CURRENT_READING,
   NAIBRD_MODULE_HEALTH_MONITOR_MIN_READING,
   NAIBRD_MODULE_HEALTH_MONITOR_MAX_READING,
   NAIBRD_MODULE_HEALTH_MONITOR_LOWER_WARNING_THRESHOLD,
   NAIBRD_MODULE_HEALTH_MONITOR_LOWER_CRITICAL_THRESHOLD,
   NAIBRD_MODULE_HEALTH_MONITOR_UPPER_WARNING_THRESHOLD,
   NAIBRD_MODULE_HEALTH_MONITOR_UPPER_CRITICAL_THRESHOLD,
   NAIBRD_MODULE_HEALTH_MONITOR_VALUE_TYPE_ENUM_COUNT
};
typedef uint32_t nai_module_health_monitor_value_type_t;
enum nai_module_health_monitor_status_type
{
   NAIBRD_MODULE_HEALTH_MONITOR_STATUS_LOWER_WARNING_THRESHOLD,
   NAIBRD_MODULE_HEALTH_MONITOR_STATUS_LOWER_CRITICAL_THRESHOLD,
   NAIBRD_MODULE_HEALTH_MONITOR_STATUS_UPPER_WARNING_THRESHOLD,
   NAIBRD_MODULE_HEALTH_MONITOR_STATUS_UPPER_CRITICAL_THRESHOLD,
   NAIBRD_MODULE_HEALTH_MONITOR_STATUS_TYPE_ENUM_COUNT
};
typedef uint32_t nai_module_health_monitor_status_type_t;
enum nai_status_access_type
{
   NAI_STATUS_LATCHED,
   NAI_STATUS_REALTIME
};
typedef int32_t nai_status_access_type_t;
typedef enum naibrd_module_sync_config_type
{
   NAIBRD_SYNC_CONFIG_CLOCK,
   NAIBRD_SYNC_CONFIG_TRIGGER
} naibrd_module_sync_config_type_t;