Software Library API naibrd 1.62
See all documentation at naii.docs.com
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Functions | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFORaw32 (int32_t cardIndex, int32_t module, int32_t channel, uint32_t count, uint32_t data[], uint32_t *outwrite) |
Loads raw data elements in the D/A channel's FIFO buffer. The data is presented in two's complement format. For bipolar mode; 0x00007FFF equals Positive Full Scale, 0xFFFF8000 equals Negative Full Scale. For unipolar mode, the range is from 0x00000000 to 0x0000FFFF where 0x0000FFFF equals Full Scale. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFO32 (int32_t cardIndex, int32_t module, int32_t channel, uint32_t count, float32_t data[], uint32_t *outwrite) |
Loads single precision floating-point data elements in the D/A channel's FIFO buffer. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFORaw16 (int32_t cardIndex, int32_t module, int32_t channel, uint32_t count, uint16_t data[], uint32_t *outwrite) |
Loads data elements in the D/A channel's FIFO buffer. The data is presented in two's complement format. For bipolar mode; 0x7FFF equals Positive Full Scale, 0x8000 equals Negative Full Scale. For unipolar mode, the range is from 0x0000 to 0xFFFF where 0xFFFF equals Full Scale. Performs a 16bit write if the board is Gen2 or 3 and a 32bit write if the board is Gen5. NOTE: For performance reasons, Gen5 modules should use naibrd_DA_SetFIFORaw32 instead of this API. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFOAlmostEmptyThreshold (int32_t cardIndex, int32_t module, int32_t channel, uint32_t threshold) |
Sets the Almost Empty level to use to set or reset the D/A channel's FIFO Status "Almost Empty" bit. When the D/A channel's FIFO counter is less than or equal to the Almost Empty level, the "Almost Empty" bit will be set. When the D/A channel's FIFO counter is greater than the Almost Empty level, the "Almost Empty" bit will be reset. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_GetFIFOAlmostEmptyThreshold (int32_t cardIndex, int32_t module, int32_t channel, uint32_t *outthreshold) |
Retrieves the Almost Empty level to use to set or reset the D/A channel's FIFO Status "Almost Empty" bit. When the D/A channel's FIFO counter is less than or equal to the Almost Empty level, the "Almost Empty" bit will be set. When the D/A channel's FIFO counter is greater than the Almost Empty level, the "Almost Empty" bit will be reset. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFOAlmostFullThreshold (int32_t cardIndex, int32_t module, int32_t channel, uint32_t threshold) |
Sets the Almost Full level to use to set or reset the D/A channel's FIFO Status "Almost Full" bit. When the D/A channel's FIFO counter is greater than or equal to the Almost Full level, the "Almost Full" bit will be set. When the D/A channel's FIFO counter is less than the Almost Full level, the "Almost Full" bit will be reset. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_GetFIFOAlmostFullThreshold (int32_t cardIndex, int32_t module, int32_t channel, uint32_t *outthreshold) |
Retrieves the Almost Full level to use to set or reset the D/A channel's FIFO Status "Almost Full" bit. When the D/A channel's FIFO counter is greater than or equal to the Almost Full level, the "Almost Full" bit will be set. When the D/A channel's FIFO counter is less than the Almost Full level, the "Almost Full" bit will be reset. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFOLoThreshold (int32_t cardIndex, int32_t module, int32_t channel, uint32_t threshold) |
Sets the low threshold level to use to set or reset the D/A channel's FIFO Status "Low Limit" bit. When the D/A channel's FIFO counter is less than or equal to the low threshold level, the "Low Limit" bit will be set. When the D/A channel's FIFO counter is greater than the low threshold level, the "Low Limit" bit will be reset. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_GetFIFOLoThreshold (int32_t cardIndex, int32_t module, int32_t channel, uint32_t *outthreshold) |
Retrieves the low threshold level to use to set or reset the D/A channel's FIFO Status "Low Limit" bit. When the D/A channel's FIFO counter is less than or equal to the low threshold level, the "Low Limit" bit will be set. When the D/A channel's FIFO counter is greater than the low threshold level, the "Low Limit" bit will be reset. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFOHiThreshold (int32_t cardIndex, int32_t module, int32_t channel, uint32_t threshold) |
Sets the high threshold level to use to set or reset the D/A channel's FIFO Status "High Limit" bit. When the D/A channel's FIFO counter is greater than or equal to the high threshold level, the "High Limit" bit will be set. When the D/A channel's FIFO counter is less than the high threshold level, the "High Limit" bit will be reset. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_GetFIFOHiThreshold (int32_t cardIndex, int32_t module, int32_t channel, uint32_t *outthreshold) |
Retrieves the high threshold level to use to set or reset the D/A channel's FIFO Status "High Limit" bit. When the D/A channel's FIFO counter is greater than or equal to the high threshold level, the "High Limit" bit will be set. When the D/A channel's FIFO counter is less than the high threshold level, the "High Limit" bit will be reset. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFODelay (int32_t cardIndex, int32_t module, int32_t channel, uint32_t delay) |
Sets the number of delay samples before the actual FIFO data is "outputted" after a trigger is initiated. This sets a delay time after trigger prior to "outputting" the data. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_GetFIFODelay (int32_t cardIndex, int32_t module, int32_t channel, uint32_t *outdelay) |
Retrieves the number of delay samples before the actual FIFO data is "outputted" after a trigger is initiated. This sets a delay time after trigger prior to "outputting" the data. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFOSize (int32_t cardIndex, int32_t module, int32_t channel, uint32_t size) |
Sets the size of the FIFO buffer. The largest size that a FIFO buffer can be is 26,213 (0x6665). | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_GetFIFOSize (int32_t cardIndex, int32_t module, int32_t channel, uint32_t *outsize) |
Retrieves the size of the FIFO buffer. The largest size that a FIFO buffer can be is (26,213 (0x6665) for Gen3 and 26,213 (0x6665) for Gen5) . | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFORate (int32_t cardIndex, int32_t module, int32_t channel, uint32_t rate) |
Sets the sampling rate for the D/A channel's FIFO buffer. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_GetFIFORate (int32_t cardIndex, int32_t module, int32_t channel, uint32_t *outrate) |
Gets the sampling rate for the D/A channel's FIFO buffer. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFOCtrl (int32_t cardIndex, int32_t module, int32_t channel, nai_da_fifo_ctrl_t ctrl) |
Sets the Buffer Operation Modes for the D/A channel's FIFO buffer. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_GetFIFOCtrl (int32_t cardIndex, int32_t module, int32_t channel, nai_da_fifo_ctrl_t *outctrl) |
Retrieves the Buffer Operation Modes for the D/A channel's FIFO buffer. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_ClearFIFO (int32_t cardIndex, int32_t module, int32_t channel) |
Clears the channel's data FIFO. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SetFIFOTrigCtrl (int32_t cardIndex, int32_t module, int32_t channel, nai_da_fifo_trig_t ctrl) |
Sets the D/A channel's FIFO buffer trigger control configuration. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_GetFIFOTrigCtrl (int32_t cardIndex, int32_t module, int32_t channel, nai_da_fifo_trig_t *outctrl) |
Retrieves the D/A channel's FIFO buffer trigger control configuration. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SoftwareTrigger (int32_t cardIndex, int32_t module) |
Sets the D/A module's FIFO Buffer Software Trigger register to 1. The Software trigger is used to kick start the FIFO buffer and the output of data. The Trigger Control Configuration for each D/A channel's FIFO must be set up properly before invoking this routine. Setting the Software Trigger will start FIFO data output for all D/A channels. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_SoftwareTriggerByChannel (int32_t cardIndex, int32_t module, int32_t channel) |
Sets the FIFO Buffer Software Trigger register for the DA module and channel specified to 1. The Software trigger is used to kick start the FIFO buffer and the output of data. DA5 Only*- the channel parameter is a bitmap of the channels that are to be triggered where the B0 (LSB) is channel 1, B1 is channel 2, B2 is channel 3, ... | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_GetFIFOStatus (int32_t cardIndex, int32_t module, int32_t channel, nai_da_fifo_status_type_t type, nai_da_fifo_status_t *outstatus) |
Retrieves the D/A channel's FIFO Buffer Status. | |
NAIBRDFUNC nai_status_t NAIAPI | naibrd_DA_ClearFIFOLatchedStatus (int32_t cardIndex, int32_t module, int32_t channel, uint32_t bit) |
Clears the D/A Buffer Fifo Latched Status for the specified channel. | |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_ClearFIFO | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel ) |
Clears the channel's data FIFO.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_ClearFIFOLatchedStatus | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t | bit ) |
Clears the D/A Buffer Fifo Latched Status for the specified channel.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
bit | : (Input) FIFO Status Types to clear (bit-mapped) |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_GetFIFOAlmostEmptyThreshold | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t * | outthreshold ) |
Retrieves the Almost Empty level to use to set or reset the D/A channel's FIFO Status "Almost Empty" bit. When the D/A channel's FIFO counter is less than or equal to the Almost Empty level, the "Almost Empty" bit will be set. When the D/A channel's FIFO counter is greater than the Almost Empty level, the "Almost Empty" bit will be reset.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
outthreshold | : (Output) Almost Empty Level. (0-NAI_DA_GEN3_FIFO_MAX_SIZE or 0-NAI_DA_GEN5_FIFO_MAX_SIZE. For DA2 0-NAI_DA_GEN5_DA2_FIFO_MAX_SIZE). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_GetFIFOAlmostFullThreshold | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t * | outthreshold ) |
Retrieves the Almost Full level to use to set or reset the D/A channel's FIFO Status "Almost Full" bit. When the D/A channel's FIFO counter is greater than or equal to the Almost Full level, the "Almost Full" bit will be set. When the D/A channel's FIFO counter is less than the Almost Full level, the "Almost Full" bit will be reset.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
outthreshold | : (Output) High Threshold Level. (0-NAI_DA_GEN3_FIFO_MAX_SIZE or 0-NAI_DA_GEN5_FIFO_MAX_SIZE or for DA2 0-NAI_DA_GEN5_DA2_FIFO_MAX_SIZE). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_GetFIFOCtrl | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
nai_da_fifo_ctrl_t * | outctrl ) |
Retrieves the Buffer Operation Modes for the D/A channel's FIFO buffer.
Bit Format: (LSB) B0 - Buffer Enable 1 = Enable Enables buffer data to be output, once triggered, at set set sample rate and fifo size. 0 = Disable Disables buffer data output. Output is directly controlled from data register. B1 - Mode 1 = Repeat Data will be outputted from the buffer, once triggered, at the set sample rate and fifo size, continuously repeat. Once disabled, the data will finish the cycle and staty with the output at the last value. 0 = 1-Shot Data will be outputted from the buffer, once triggered, at the set sample rate and fifo size, one time. B2 - Reserved B3 - Reserved B4 - Reserved B5 - Reserved B6 - Reserved (MSB) B7 - Reserved
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
outctrl | : (Output) FIFO Data Control Format. |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_GetFIFODelay | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t * | outdelay ) |
Retrieves the number of delay samples before the actual FIFO data is "outputted" after a trigger is initiated. This sets a delay time after trigger prior to "outputting" the data.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
outdelay | : (Output) Number of delay samples before FIFO data output (0 - 65535 (0xFFFF)). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_GetFIFOHiThreshold | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t * | outthreshold ) |
Retrieves the high threshold level to use to set or reset the D/A channel's FIFO Status "High Limit" bit. When the D/A channel's FIFO counter is greater than or equal to the high threshold level, the "High Limit" bit will be set. When the D/A channel's FIFO counter is less than the high threshold level, the "High Limit" bit will be reset.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
outthreshold | : (Output) High Threshold Level. (0-NAI_DA_GEN3_FIFO_MAX_SIZE or 0-NAI_DA_GEN5_FIFO_MAX_SIZE or for DA2 0-NAI_DA_GEN5_DA2_FIFO_MAX_SIZE). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_GetFIFOLoThreshold | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t * | outthreshold ) |
Retrieves the low threshold level to use to set or reset the D/A channel's FIFO Status "Low Limit" bit. When the D/A channel's FIFO counter is less than or equal to the low threshold level, the "Low Limit" bit will be set. When the D/A channel's FIFO counter is greater than the low threshold level, the "Low Limit" bit will be reset.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
outthreshold | : (Output) Low Threshold Level. (0-NAI_DA_GEN3_FIFO_MAX_SIZE or 0-NAI_DA_GEN5_FIFO_MAX_SIZE or for DA2 0-NAI_DA_GEN5_DA2_FIFO_MAX_SIZE). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_GetFIFORate | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t * | outrate ) |
Gets the sampling rate for the D/A channel's FIFO buffer.
FOR DA1 --> The value set for the sampling rate is the divisor of the actual base D/A sample rate (390.625 KHz). For example, if the sample rate is set to 2, after triggering, the output data rate will be 195.3125 KHz.
FOR DA2 --> The value set for the sample rate is the output frequency. The rate is programmable from 2.5KHz to 25KHz. For example, if the rate is 2.5KHz, *outrate = 2500.
FOR DA3 --> The value set for the sample rate is the output frequency. The rate is programmable from 2MHz to 200KHz. For example, if the rate is 200KHz, *outrate = 2000000.
FOR DA5 --> The value set for the sample rate is the output frequency. The rate is programmable from ??? to 100KHz in 10us steps (must divide by 100000hZ evenly). For example, if the rate is 100KHz,*outrate = 1000000; 50kHz, *outrate = 50000.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module])(Ignored for Gen5 DA1, Sample rate is applied module wide). |
outrate | : (Output) FIFO Sample Rate (1 - 65535 (0xFFFF)). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_GetFIFOSize | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t * | outsize ) |
Retrieves the size of the FIFO buffer. The largest size that a FIFO buffer can be is (26,213 (0x6665) for Gen3 and 26,213 (0x6665) for Gen5) .
Important Note: If the size is set to 0, the buffer will be read and output after triggering. The user must insure (via threshold or equivalent) that the data is being "fed" to the buffer. Otherwise, if data in the buffer empties, the D/A channel will output the last value. It is recommended that Size be set as part of an initialization. It is not recommended to change Size while there are data in the buffer.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
outsize | : (Output) Number of samples before FIFO triggers output (0-NAI_DA_GEN3_FIFO_MAX_SIZE or 0-NAI_DA_GEN5_FIFO_MAX_SIZE). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_GetFIFOStatus | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
nai_da_fifo_status_type_t | type, | ||
nai_da_fifo_status_t * | outstatus ) |
Retrieves the D/A channel's FIFO Buffer Status.
Bit Format: (LSB) B0 - Empty When the D/A channel's FIFO counter is zero, B0 = 1, otherwise B0 = 0. B1 - Low Limit When the D/A channel's FIFO counter is less than or equal to the Low Threshold, B1 = 1, otherwise B1 = 0. B2 - High Limit When the D/A channel's FIFO counter is greater than or equal to the High Threshold, B2 = 1, otherwise B2 = 0. B3 - Full When the D/A channel's FIFO counter is equal to 26,213, B3 = 1, otherwise B3 = 0. B4 - Sample Done When the D/A channel's FIFO counter is equal to the FIFO size after the trigger occurs, B4 = 1, otherwise B4 = 0. B5 - Reserved B6 - Reserved (MSB) B7 - Reserved FIFO Buffer Interrupt Bit Format (GEN5): (LSB) B0 - Empty Interrupt when the D/A channel's FIFO counter is zero. B1 - Almost Empty Interrupt when the D/A channel's FIFO counter is greater than or equal to the Almost Empty Threshold. B2 - Low Limit Interrupt when the D/A channel's FIFO counter is less than or equal to the Low Threshold. B3 - High Limit Interrupt when the D/A channel's FIFO counter is greater than or equal to the High Threshold. B4 - Almost Full Interrupt when the D/A channel's FIFO counter is greater than or equal to the Almost Full Threshold. B5 - Full Interrupt when the D/A channel's FIFO counter is equal to NAI_DA_GEN5_FIFO_MAX_SIZE. B6 - Sample Done Interrupt when the D/A channel's FIFO counter is equal to the FIFO size after the trigger occurs. (MSB) B7 - Reserved
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
type | : (Input) Status type requested (ONLY valid for Gen5 DA1, otherwise ignored) (NAI_DA_FIFO_STATUS_LATCHED or NAI_DA_FIFO_STATUS_REALTIME). |
outstatus | : (Output) FIFO Buffer Status. |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_GetFIFOTrigCtrl | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
nai_da_fifo_trig_t * | outctrl ) |
Retrieves the D/A channel's FIFO buffer trigger control configuration.
Register Value Trigger Source Slope --------------------------------------------------- 0x20 External Trigger 2 Positive 0x21 External Trigger 1 Positive 0x22 Software Trigger N/A 0x30 External Trigger 2 Negative 0x31 External Trigger 1 Negative 0x32 Software Trigger N/A 0x40 Initiate 0x80 Stop (Clear Trigger) Trigger Configuration Format: (LSB) B0-B1 = Source Select 0x0 = External Trigger 2 0x1 = External Trigger 1 0x2 = Software Trigger B3 = Reserved (MSB) B4-B7 = Trigger Type 0x1X = Negative Slope 0x2X = Trigger Pulse Enable 0x4X = Trigger Pulse/Trigger Enable Select 0x8X = Trigger Clear
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
outctrl | : (Output) FIFO Trigger Control. |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFO32 | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t | count, | ||
float32_t | data[], | ||
uint32_t * | outwrite ) |
Loads single precision floating-point data elements in the D/A channel's FIFO buffer.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
count | : (Input) Number of data elements to write to FIFO. |
data[] | : (Input) Array of 32-bit raw data. |
outwrite | :(Output) Number of data elements written to the D/A channel's FIFO buffer. |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFOAlmostEmptyThreshold | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t | threshold ) |
Sets the Almost Empty level to use to set or reset the D/A channel's FIFO Status "Almost Empty" bit. When the D/A channel's FIFO counter is less than or equal to the Almost Empty level, the "Almost Empty" bit will be set. When the D/A channel's FIFO counter is greater than the Almost Empty level, the "Almost Empty" bit will be reset.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
threshold | : (Input) Almost Empty Threshold Level. (0-NAI_DA_GEN3_FIFO_MAX_SIZE or 0-NAI_DA_GEN5_FIFO_MAX_SIZE. For DA2 0-NAI_DA_GEN5_DA2_FIFO_MAX_SIZE). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFOAlmostFullThreshold | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t | threshold ) |
Sets the Almost Full level to use to set or reset the D/A channel's FIFO Status "Almost Full" bit. When the D/A channel's FIFO counter is greater than or equal to the Almost Full level, the "Almost Full" bit will be set. When the D/A channel's FIFO counter is less than the Almost Full level, the "Almost Full" bit will be reset.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
threshold | : (Input) Almost Full Level. (0-NAI_DA_GEN3_FIFO_MAX_SIZE or 0-NAI_DA_GEN5_FIFO_MAX_SIZE or for DA2 0-NAI_DA_GEN5_DA2_FIFO_MAX_SIZE). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFOCtrl | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
nai_da_fifo_ctrl_t | ctrl ) |
Sets the Buffer Operation Modes for the D/A channel's FIFO buffer.
Bit Format: (LSB) B0 - Buffer Enable 1 = Enable Enables buffer data to be output, once triggered, at set set sample rate and fifo size. 0 = Disable Disables buffer data output. Output is directly controlled from data register. B1 - Mode 1 = Repeat Data will be outputted from the buffer, once triggered, at the set sample rate and fifo size, continuously repeat. Once disabled, the data will finish the cycle and staty with the output at the last value. 0 = 1-Shot Data will be outputted from the buffer, once triggered, at the set sample rate and fifo size, one time. B2 - Reserved B3 - Reserved B4 - Reserved B5 - Reserved B6 - Reserved (MSB) B7 - Reserved
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
ctrl | : (Input) FIFO Data Control Format. |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFODelay | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t | delay ) |
Sets the number of delay samples before the actual FIFO data is "outputted" after a trigger is initiated. This sets a delay time after trigger prior to "outputting" the data.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
delay | : (Input) Number of delay samples before FIFO data output (0 - 65535 (0xFFFF)). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFOHiThreshold | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t | threshold ) |
Sets the high threshold level to use to set or reset the D/A channel's FIFO Status "High Limit" bit. When the D/A channel's FIFO counter is greater than or equal to the high threshold level, the "High Limit" bit will be set. When the D/A channel's FIFO counter is less than the high threshold level, the "High Limit" bit will be reset.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
threshold | : (Input) High Threshold Level. (0-NAI_DA_GEN3_FIFO_MAX_SIZE or 0-NAI_DA_GEN5_FIFO_MAX_SIZE or for DA2 0-NAI_DA_GEN5_DA2_FIFO_MAX_SIZE). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFOLoThreshold | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t | threshold ) |
Sets the low threshold level to use to set or reset the D/A channel's FIFO Status "Low Limit" bit. When the D/A channel's FIFO counter is less than or equal to the low threshold level, the "Low Limit" bit will be set. When the D/A channel's FIFO counter is greater than the low threshold level, the "Low Limit" bit will be reset.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
threshold | : (Input) Low Threshold Level. (0-NAI_DA_GEN3_FIFO_MAX_SIZE or 0-NAI_DA_GEN5_FIFO_MAX_SIZE or for DA2 0-NAI_DA_GEN5_DA2_FIFO_MAX_SIZE). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFORate | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t | rate ) |
Sets the sampling rate for the D/A channel's FIFO buffer.
FOR DA1 --> The value set for the sample rate is the output frequency. The rate is programmable from 100KHz to 400KHz. For example, if you want a rate of 2.5KHz, set rate = 2500.
FOR DA2 --> The value set for the sample rate is the output frequency. The rate is programmable from 2.5KHz to 25KHz. For example, if you want a rate of 2.5KHz, set rate = 2500.
FOR DA3 --> The value set for the sample rate is the output frequency. The rate is programmable from 200KHz to 2MHz. For example, if you want a rate of 200KHz, set rate = 2000000.
FOR DA5 --> The value set for the sample rate is the output frequency. The rate is programmable from 1 to 10KHz. For example, if you want a rate of 10KHz, set rate = 100000.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module])(Ignored for Gen5 DA1, Sample rate is applied module wide). |
rate | : (Input) FIFO Sample Rate (1 - 65535 (0xFFFF)). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFORaw16 | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t | count, | ||
uint16_t | data[], | ||
uint32_t * | outwrite ) |
Loads data elements in the D/A channel's FIFO buffer. The data is presented in two's complement format. For bipolar mode; 0x7FFF equals Positive Full Scale, 0x8000 equals Negative Full Scale. For unipolar mode, the range is from 0x0000 to 0xFFFF where 0xFFFF equals Full Scale. Performs a 16bit write if the board is Gen2 or 3 and a 32bit write if the board is Gen5. NOTE: For performance reasons, Gen5 modules should use naibrd_DA_SetFIFORaw32 instead of this API.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
count | : (Input) Number of data elements to write to FIFO. |
data[] | : (Input) Array of 16-bit raw data. |
outwrite | :(Output) Number of data elements written to the D/A channel's FIFO buffer. |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFORaw32 | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t | count, | ||
uint32_t | data[], | ||
uint32_t * | outwrite ) |
Loads raw data elements in the D/A channel's FIFO buffer. The data is presented in two's complement format. For bipolar mode; 0x00007FFF equals Positive Full Scale, 0xFFFF8000 equals Negative Full Scale. For unipolar mode, the range is from 0x00000000 to 0x0000FFFF where 0x0000FFFF equals Full Scale.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
count | : (Input) Number of data elements to write to FIFO. |
data[] | : (Input) Array of 32-bit raw data. |
outwrite | :(Output) Number of data elements written to the D/A channel's FIFO buffer. |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFOSize | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
uint32_t | size ) |
Sets the size of the FIFO buffer. The largest size that a FIFO buffer can be is 26,213 (0x6665).
Important Note: If the size is set to 0, the buffer will be read and output after triggering. The user must insure (via threshold or equivalent) that the data is being "fed" to the buffer. Otherwise, if data in the buffer empties, the D/A channel will output the last value. It is recommended that Size be set as part of an initialization. It is not recommended to change Size while there are data in the buffer.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
size | : (Input) Number of samples before FIFO triggers output (0-NAI_DA_GEN3_FIFO_MAX_SIZE or 0-NAI_DA_GEN5_FIFO_MAX_SIZE). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SetFIFOTrigCtrl | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel, | ||
nai_da_fifo_trig_t | ctrl ) |
Sets the D/A channel's FIFO buffer trigger control configuration.
Register Value Trigger Source Slope --------------------------------------------------- 0x20 External Trigger 2 Positive 0x21 External Trigger 1 Positive 0x22 Software Trigger N/A 0x30 External Trigger 2 Negative 0x31 External Trigger 1 Negative 0x32 Software Trigger N/A 0x40 Initiate 0x80 Stop (Clear Trigger) Trigger Configuration Format: (LSB) B0-B1 = Source Select 0x0 = External Trigger 2 0x1 = External Trigger 1 0x2 = Software Trigger B3 = Reserved (MSB) B4-B7 = Trigger Type 0x1X = Negative Slope 0x2X = Trigger Pulse Enable 0x4X = Trigger Pulse/Trigger Enable Select 0x8X = Trigger Clear
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |
ctrl | : (Input) FIFO Trigger Control. |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SoftwareTrigger | ( | int32_t | cardIndex, |
int32_t | module ) |
Sets the D/A module's FIFO Buffer Software Trigger register to 1. The Software trigger is used to kick start the FIFO buffer and the output of data. The Trigger Control Configuration for each D/A channel's FIFO must be set up properly before invoking this routine. Setting the Software Trigger will start FIFO data output for all D/A channels.
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
NAIBRDFUNC nai_status_t NAIAPI naibrd_DA_SoftwareTriggerByChannel | ( | int32_t | cardIndex, |
int32_t | module, | ||
int32_t | channel ) |
Sets the FIFO Buffer Software Trigger register for the DA module and channel specified to 1. The Software trigger is used to kick start the FIFO buffer and the output of data. DA5 Only*- the channel parameter is a bitmap of the channels that are to be triggered where the B0 (LSB) is channel 1, B1 is channel 2, B2 is channel 3, ...
cardIndex | : (Input) Logical Card Index assigned to connection with the NAI_BOARD (0 - NAI_MAX_CARDS-1). |
module | : (Input) Module Number of the module to access (1 - [max modules for board]). |
channel | : (Input) Channel Number of the channel to access (1 - [max channels for module]). |